1. Field of the Invention
The present invention relates to a method for producing a group III nitride compound semiconductor substrate.
2. Description of the Prior Art
A group III nitride compound semiconductor expressed by the general formula Al.sub.X Ga.sub.1-X-Y In.sub.Y N (where 0.ltoreq.X.ltoreq.1, 0.ltoreq.Y.ltoreq.1, 0.ltoreq.X+Y.ltoreq.1) can have a band gap energy in a wide range from 1.9e V to 6.2e V. For this reason, the group III nitride compound semiconductor (hereinafter, also referred to as III-N semiconductor) is a promising semiconductor material for a light-emitting/receiving device that covers a wide range from visible light to UV rays.
A large-area III-N semiconductor substrate with good quality is in demand as a substrate for producing a III-N semiconductor device. As an attempt to meet this demand, there is a conventional method for producing a III-N semiconductor substrate (reported, for example in Japanese Journal of Applied Physics Vol. 37 (1998) pp. L309-L312). This conventional method will be described with reference to FIG. 8.
In the conventional method, first, a sapphire substrate 1 with a diameter of 2 inches is placed in a metal organic vapor phase epitaxy apparatus (hereinafter, also referred to as MOVPE apparatus). Then, a GaN buffer layer 2 and GaN layer 3 are formed on the sapphire substrate 1 sequentially by a MOVPE technique (FIG. 8A). Hereinafter, a sapphire substrate 1 provided with a layer or layers may be referred to as a wafer, regardless of the type of the layer.
Next, the wafer is removed from the MOVPE apparatus. Then, a SiO.sub.2 film 4 is formed on a surface of the GaN layer 3, and windows 4a are formed in a stripe geometry with a pitch of several .mu.m in the SiO.sub.2 film 4 (FIG. 8B).
Thereafter, the wafer is placed in a hydride vapor phase epitaxy (hereinafter, also referred to as HVPE) apparatus, and a GaN thick film 5a (having a thickness of about 100 .mu.m) is formed on the SiO.sub.2 film 4 (FIG. 8C).
Thereafter, the wafer is removed from the HVPE apparatus. Finally, the wafer is polished from the sapphire substrate 1 side until the GaN thick film 5a is exposed. Thus, a GaN substrate 5 having a thickness of about 80 .mu.m can be obtained (FIG. 8D).
However, the above-described conventional method has the following problems.
The sapphire substrate 1 and the GaN thick film 5a have different lattice constants and thermal expansion coefficients. Therefore, in the above-described method, a stress is applied between the sapphire substrate 1 and the GaN thick film 5a in the process of lowering the temperature of the wafer after the GaN thick film 5a is formed by causing crystal growth. Consequently, in this method, the wafer is curved so that cracks are generated in the direction perpendicular to the principle plane of the GaN thick film 5a, or the GaN thick film 5a is partially peeled. As a result, the size of the GaN substrate 5 obtained by this conventional method is at most about 1 cm.times.1 cm. Therefore, it has been difficult to obtain the GaN substrate 5 that is substantially as large as the sapphire substrate 1 in high yields and with high reproducibility. In particular, in the conventional method, stresses concentrate on the interfaces between the sapphire substrate 1 and the GaN buffer layer 2 and between the GaN buffer layer 2 and the GaN layer 3, and they adhere to each other tightly across the entire principle planes. Therefore, cracks are generated at random.